(a) Field of the Invention
The present invention relates to a flat panel display, and more particularly to a flat panel display having field emission cathodes and a manufacturing method thereof.
(b) Description of the Related Art
The various flat panel display configurations offer significant advantages over the traditional CRT display. These include a thin profile, reduced weight, low power requirements and improved picture quality. The different types of flat panel displays include the liquid crystal display (LCD), the vacuum fluorescent display (VFD), the plasma display panel (PDP), the field emission display (FED) and others.
FEDs utilize the well-established cathode-anode-phosphor technology built into full-sized CRTs, and use this in combination with the dot matrix cellular construction of LCDs. However, instead of using the single bulky tube of the CRT, FEDs use tiny xe2x80x98mini tubesxe2x80x99 for each pixel such that the display can be built in approximately the same size as an LCD screen. Also, rather than using a backlight which delivers light through a shutter-like structure as in the LCD, the FED is an emissive technology. As a result, FEDs provide good display quality at virtually any angle, a significant advantage over LCDs which, as a result of their backlight structure, lose clarity, contrast and color purity when viewed from different angles.
FIG. 7 shows a partial sectional view of a conventional FED. As shown in the drawing, the conventional FED comprises a back substrate 1 and a front substrate 3 separated by a vacuum and disposed at a predetermined distance. Cathode electrodes 5 are formed on the back substrate 1 and anode electrodes 7 are formed on the front substrate 3. The cathode electrodes 5 and the anode electrodes 7 are formed on the substrates 1 and 3 in a predetermined pattern, for example, a line pattern. The substrates 1 and 3 are sealed in this vacuum state such that a cell gap is formed therebetween, and a plurality of spacers 9 are disposed between the substrates 1 and 3 to maintain the predetermined cell gap.
An insulating layer 11, made of an oxide such as SiO2, is formed on the cathode electrodes 5 of the back substrate 1, and a gate electrode pattern 13 is formed on the insulating layer 11. Further, as shown also in FIG. 8, a plurality of apertures 15 having a predetermined diameter D are formed with the absence of the gate electrode pattern 13 and the insulating layer 11, and field emission cathodes 17 are formed in the apertures 15 contacting the cathode electrodes 5 provided on the back substrate 1. The field emission cathodes 17 are substantially flat and made of a material having a low work function such as diamond or diamond-like carbon (DLC).
With regard to the front substrate 3, a phosphor layer 19 is deposited in a predetermined pattern on the anode electrodes 7 formed on the front substrate 3. Also, a black matrix 21 is formed at areas on the anode electrode 7 in which the phosphor layer 19 is not present.
In the conventional FED structured as in the above, when a voltage is applied between a portion of the gate electrode pattern 13 and the cathode electrodes 5 of the back substrate 1 corresponding to a desired pixel area, an -electric field is formed between corresponding field emission cathodes 17 and gate electrode pattern 13. As a result, electrons are emitted from the field emission cathodes 17 and accelerate across the cell gap formed between the two substrates 1 and 3. The electrons are then induced by the anode electrodes 7, to which a high voltage is applied, to the phosphor layer 19. Accordingly, the electrons strike the phosphor layer 19 such that the same is excited and the desired image is attained.
With such a FED, the diameter D of the apertures 15 directly affects the amount of electrons emitted from the field emission cathodes 17, thereby determining the performance of the FED. That is, as the difference increases between the diameter D of the apertures 15 and an effective thickness H of the insulating layer 11, derived by subtracting a thickness K of the field emission cathodes 17 from a total thickness Hxe2x80x2 of the insulating layer 11, increases the amount of electrons emitted from the field emission cathodes 17.
However, a problem results from enlarging the diameter D of the apertures 15 with respect to the effective thickness H of the insulating layer 11. Namely, such an increase, although improving the degree to which electrons are emitted from the field emission cathodes 17, act to directly add to the amount of electrons colliding with the gate electrode pattern 13 such that leakage easily occurs. This also causes the focusing state of the electrons induced to the phosphor layer 19 to be reduced, thereby resulting in the distortion of the images being displayed.
An embodiment of the present invention has been made in an effort to solve the above problems.
It is an object of an embodiment of the present invention to provide a flat panel display having field emission cathodes and a manufacturing method thereof in which the ability of electrons emitted from the cathodes to focus on a phosphor layer is not diminished regardless of how an insulating layer and a gate electrode pattern are designed.
To achieve the above object, an embodiment of the present invention provides a flat panel display having field emission cathodes and a manufacturing method thereof. The flat panel display has a first substrate and a second substrate sealed in a vacuum at a predetermined interval to form a cell gap and includes a plurality of spacers interposed therebetween. The second substrate includes a plurality of anode electrodes formed in a predetermined pattern on one side thereof and a phosphor layer formed on the pattern of the anode electrodes. The flat panel display further comprises a plurality of cathode electrodes formed in a predetermined pattern on the first substrate, an insulating layer disposed on the cathode electrodes and having a plurality of apertures formed therein, a plurality of field emission cathodes provided in the apertures of the insulating layer contacting the cathode electrodes, a gate electrode pattern formed with a plurality of gate electrodes, the gate electrode pattern being disposed on the insulating layer and having formed openings corresponding, in size and location, to the apertures of the insulating layer, and a plurality of focusing electrodes, provided between the gate electrode pattern and the cathode electrodes, which control the flow of electrons emitted from the field emission cathodes.
According to a feature of an embodiment of the present invention, the focusing electrodes are formed in a predetermined shape and disposed within the apertures of the insulating layer.
According to another feature of the present invention, the focusing electrodes are formed in a predetermined shape and disposed within the field emission cathodes.
According to yet another feature of an embodiment of the present invention, an insulating member is interposed between the cathode electrodes and each of the focusing electrodes.
According to still yet another feature of an embodiment of the present invention, surfaces of the focusing electrodes are substantially flat and made of a material having a low work function.
According to still yet another feature of an embodiment of the present invention, the apertures of the insulating layer and the focusing electrodes are substantially circular.
According to still yet another feature of an embodiment of the present invention, a diameter of the apertures is equal to or greater than a diameter of the focusing electrodes.
According to still yet another feature of an embodiment of the present invention, the diameter of the apertures is equal to or greater than an effective thickness of the insulating layer, the effective thickness being derived by subtracting a thickness of the field emission cathodes from a total thickness of the insulating layer.
According to still yet another feature of an embodiment of the present invention, the diameter of the apertures is between 1 and 10 xcexcm, and the effective thickness of the insulating layer is between 0.5 xcexcm and 6 xcexcm.
The method of manufacturing a flat panel display of an embodiment of the present invention includes the steps of forming cathode electrodes in a predetermined pattern on one side of the first substrate; depositing a layer of insulating material used to form insulating members at a predetermined thickness on the pattern of the cathode electrodes, and depositing a material used to form focusing electrodes at a predetermined thickness on the insulating material; patterning the layers of material for the insulating members and the focusing electrodes in a predetermined shape to form a plurality of the insulating members and the focusing electrodes; depositing a material to form an insulating layer over the focusing electrodes and the insulating members at a predetermined thickness; depositing a material to form a gate electrode pattern at a predetermined thickness over the insulating layer; etching the gate electrode pattern and the insulating layer at areas corresponding to a location of the focusing electrodes and the insulating members such that apertures are formed in the insulating layer and openings are formed in the gate electrode pattern, thereby exposing the focusing electrodes and the insulating members, the apertures and the openings being substantially of the same shape and size; and depositing a material having a low work function over each pair of the focusing electrode and the insulating member within the apertures of the insulating layer to form field emission cathodes.